2023年5月2日

3 d-nand flash非易失性內存了數篇論文在即將到來的2023年研討會VLSI技術和電路。會議將在《京都議定書》,日本6月11到16歲之間。本文從Kioxia C2-1 Corp .)“1 tb 3 b /細胞3 d-flash內存超過17 gb /平方毫米鑽頭密度為3.2 gbps接口和205 mb / s項目吞吐量”提供了一種單片1 tbit內存使用210字線層。這代表了一種優化3.2 gbps閱讀界麵和編程205兆字節每秒的吞吐量。三位/組件存儲記憶細胞,達到17 gbit密度每平方毫米。一個物理8-plane架構實現讀延時40微秒和高項目205 myte每秒的吞吐量。one-pulse-two-strobe技術減少了感應時間18%,導致吞吐量205 mb / s的實現程序。> 300層Kioxia人員和長期合作夥伴西方數字設置為紙T7-1“高度可伸縮的金屬誘導側向結晶(MILC)技術對垂直矽頻道超高(> 300層)3 d閃存”Metal-induced橫向結晶允許14微米長的“通心粉”格式渠道形成在一個垂直的記憶洞超過300層。作者描述一個最近開發出鎳吸除技術。112字線分層3 d NAND閃存展品大於read-noise降低40%和10 x改善通道傳導沒有退化的存儲單元的可靠性。 >400 layers A paper from semiconductor manufacturing equipment supplier Tokyo Electron Ltd. helps chart a way to 3D-NAND flash with more than 400 layers, to double today’s commercial state of the art. Paper T3-2 is “Beyond 10 micron Depth Ultra-High Speed Etch Process with 84% Lower Carbon Footprint for Memory Channel Hole of 3D NAND Flash over 400 Layers.” In this paper authors from Tokyo Electron Miyagi discuss a novel etching process for high aspect ratio hole patterning using cryogenic temperatures and a carbon-less chemistry. The authors have found that the hole can be etched through a wafer to 10-micron depth in a time of about 33 minutes. The etch profile is said to be excellent. The reduction of greenhouse gas emissions compared with other etch processes is 84 percent. Related links and articles: